High Performance Computing Technologies, Solutions to Exascale Systems, and Beyond

Advance high-performance computing expertise by exploring HPC evolution, exascale computing, AI-driven research & optimization.

  • 0.5 CEU / 5 PDH credits
  • Launched 2023
  • 5 courses
  • 5 hours

Course Description

This course program, developed in partnership with IEEE Future Directions, starts by briefly exploring the historical evolution of “big iron” computers from the 70s, 80s, and 90s, emphasizing their relevance in today’s exascale systems. It delves into the shift from optimization concerns in the 90s to structuring applications for optimal hardware utilization. Then focuses on high-performance computing, and how to address challenges and solutions in the Exascale era. The role of HPC as a platform for scientific discovery is examined, with real-world applications such as rapid-response drug discovery during the COVID-19 pandemic. It showcases how the increasing demand for advanced models using enormous amounts of data is met through hardware and software optimization. The current and future CPU and GPU contexts, programming languages in HPC, parallel programming models, and workload management are also discussed. Last, the use of AI in scientific research and emerging technologies for improved AI delivery in HPC applications is extensively discussed with real life examples.

Course Objectives

  • Understand how supercomputer architectures from the 60s, 70s, & 80s, on-processor parallelism, the decreasing clock cycle in the late 90s, and the introduction of GPUs and multi-core nodes affect high performance computing today
  • Describe high performance computing evolution and what is the exascale era of computing. How exascale enables the discovery of actionable insights based on real-life examples or “grand challenge” problems as happened with the COVID-19 drug/vaccine research
  • Understand how it is possible to accelerate application performance via choice of processor, the memory hierarchy, the interconnect, the architecture, and the choice of storage hardware
  • Describe the expected hardware components and systems that will be prevalent in the near future in HPC systems. Additionally, the software used to program and run applications in modern systems will be discussed
  • To learn about the leading edge of HPC research that involves understanding how AI can be used in science in addition to the latest developments in heterogeneity. To see examples of serverless computing that portray the delivery of HPC as a service. To describe those technologies that can be used to better deliver AI for science and HPC

Authors and Instructors

Sreenivas Rangan Sukumar

Hewlett Packard Mission Critical Systems Chief Technology Office

Sreenivas Rangan Sukumar is a data science/artificial intelligence (AI) system architect with a unique 10-plus years of experience with high performance computing (HPC). Today, he works at Hewlett Packard Enterprise (HPE) as a distinguished technologist in the company’s esteemed Chief Technology Office. Before serving in a similar role at Cray, Inc., he was a scientist and group leader at Oak Ridge National Laboratory responsible for knowledge discovery and data science workflows on the world’s fastest supercomputers. He has a Ph.D. in artificial intelligence and over 100 publications describing edge-to-exascale pipelines of disparate data collection, organization, processing, integration, fusion, analysis, and inference. Currently, he is focused on architecting AI-first query systems and building next-generation supercomputers designed for data science and AI workloads. In this course, he will share unique experiences and perspectives as a user, customer, and architect of high performance computing systems.

Paolo Faraboschi

Vice President and HPE Fellow and directs Artificial Intelligence Research at Hewlett Packard Labs

Dr. Paolo Faraboschi is the author of 60 granted, is the author of 60 granted patents, over 100 publications, and the book “Embedded Computing: a VLIW Approach.” In 2014, Paolo was named IEEE Fellow for contributions to embedded processor architecture and system-on-chip technology. He pioneered low-energy servers with HP’s project Moonshot (2010-2014), helped to engineer the hardware architecture of “The Machine” project (2014-2016), and conducted exascale computing research (2017-2020). Today he is Vice President and HPE Fellow and directs Artificial Intelligence Research at Hewlett Packard Labs.

Larry Kaplan

Senior Distinguished Technologist at HPE

Larry Kaplan earned his Bachelor’s degree in Computer Science modified with Electrical Engineering from Dartmouth College and a Master’s degree in Computer Architecture from NYU. Since that time, for the next 30 years, he has been working on HPC systems and played a significant role in the design of the XC, XE, XT, XMT, and MTA supercomputers, especially in the areas of runtime, operating and supervisory systems, and hardware/software interface. Past projects have included work in system and application resiliency, virtual and physical memory management, and network communication and management. Today Larry is a Senior Distinguished Technologist at HPE working as the Chief Software Architect for HPC focusing on the design and implementation of the software stack for the current and next generations of the HPE Cray Supercomputer product line. Special focus areas include federated workflows, advanced systems, and power management, open and modular software ecosystems, and advanced network software stacks from managers and drivers up through programming models.. Larry Kaplan holds over a dozen U.S. patents.

John Levesque

Hewlett Packard Mission Critical Systems Chief Technology Office

John Levesque is a high-performance computing “Evangelist” that holds advanced degrees in both physics and mathematics and has worked in the field of high-performance computing for over 50 years. He has worked with all relevant hardware from earliest to latest and has led teams for IBM Research, Applied Parallel Research, and Pacific Sierra Research. For many years he was the director of the Cray Supercomputer Center of Excellence based at the Los Alamos National Laboratory in New Mexico. Today he is a member of the Hewlett Packard Mission Critical Systems Chief Technology Office. In the national-international scientific and technical computing community, he is a well-known lecturer and author of three books: “A Guidebook to Fortran on Supercomputers,” “High Performance Computing – Programming and Applications,” and “Programming for Hybrid Multi/Manycore MPP Systems.”

Dejan Milojicic

Distinguished technologist, Hewlett Packard Labs

Dr. Milojicic is the author of 80 granted patents, over 240 publications, and two books. Dejan is an IEEE Fellow and the former president of the IEEE Computer Society (2014). He was the editor-in-chief of IEEE Computing Now and IEEE Distributed Systems Online. He envisioned, designed, and taught a Cloud Management class at San Jose State University and has led many industry-government and academic collaborations, such as Open Cirrus for the HPC in the Cloud program and the New Operating System for the Machine program. Today, he works at Hewlett Packard Labs as a distinguished technologist where he leads the research on Future Architectures and is the principal investigator of Heterogeneous Serverless Computing.

Barbara Chapman

Distinguished Technologist for the Cray Programming Environment at Hewlett Packard Enterprise (HPE)

Dr. Barbara Chapman obtained her Ph.D. in Computer Science from Queen’s University of Belfast and today is a Distinguished Technologist for the Cray Programming Environment at Hewlett Packard Enterprise (HPE). She has taught as a Professor of Computer Science at Stony Brook University for over 20 years and remains affiliated with the Department of Computer Science and the Institute for Advanced Computational Science. Her research group contributes to the open-source LLVM compiler infrastructure, especially to its OpenMP implementation, and has provided a reference implementation of the library-based OpenSHMEM parallel programming standard. Barbara has also served as Chair of the Department of Computer Science and Mathematics at the Department of Energy’s Brookhaven National Laboratory. Her research interests focus on parallel programming interfaces and related implementation technology and has authored more than 300+ refereed technical publications.